The U.S. Department of Commerce’s National Institute of Standards and Technology (NIST) has signed a cooperative research and development agreement with Google to develop and produce chips that researchers can use to develop new nanotechnology and semiconductor devices.
The chips will be manufactured by SkyWater Technology at its Bloomington, Minnesota, semiconductor foundry. Google will pay the initial cost of setting up production and will subsidize the first production run. NIST, with university research partners, will design the circuitry for the chips. The circuit designs will be open source, allowing academic and small business researchers to use the chips without restriction or licensing fees.
Large companies that design and manufacture semiconductors often have ready access to these types of chips. But the cost can run into the hundreds of thousands of dollars, presenting a major hurdle to innovation by university and startup researchers. By increasing production to achieve economies of scale and by implementing a legal framework that eliminates licensing fees, the collaboration is expected to bring the cost of these chips down dramatically. This collaboration was planned before the recent passage of the CHIPS Act in the US.
Modern microelectronic devices are made of components that are stacked like layers in a cake, with the bottom layer being a semiconductor chip. The NIST/Google collaboration will make available a bottom-layer chip with specialized structures for measuring and testing the performance of the components placed on top of it, including new kinds of memory devices, nanosensors, bioelectronics and advanced devices needed for artificial intelligence and quantum computing.
NIST anticipates designing as many as 40 different chips optimized for different applications. Because the chip designs will be open source, researchers will be able to pursue new ideas without restriction and share data and device designs freely.
The SkyWater foundry will produce the chips in the form of 200-millimeter wafers, which universities and other purchasers can dice into thousands of individual chips at their own processing facilities. The 200mm wafer is an industry standard format compatible with the manufacturing robots at most semiconductor foundries. Giving researchers access to chips in this format will allow them to prototype designs and emerging technologies that, if successful, can be integrated into production more quickly, thus speeding the transfer of technology from lab to market.
Research partners contributing to the chip designs include the University of Michigan, the University of Maryland, George Washington University, Brown University and Carnegie Mellon University.